1 ? ha-2510/883 high slew rate operational amplifier the ha-2510/883 is a high performance operational amplifier which sets the standards for maximum slew rate and wide bandwidth operation in moderately powered, internally compensated, monolithic devices. in addition to excellent dynamic characteristics, this dielectrically isolated amplifier also offers low offset current and high input impedance. the 50v/ s minimum slew rate and fast settling time of the ha-2510/883 are ideally suited for high speed d/a, a/d, and pulse amplificatio n designs. the ha-2510/883?s superior bandwidth and 750khz minimum full power bandwidth are extremely useful in rf and video applications. to insure compliance with slew rate and transient response specifications, all devices are 100% tested for ac performance characteristics over full temperature limits. to improve signal conditioning accuracy, the ha-2510/883 provides a maxi mum offset current of 25na and a minimum input impedance of 50m ? , both at 25 o c, as well as offset voltage adjust capability. features ? this circuit is processed in accordance to mil-std-883 and is fully conformant under the provisions of paragraph 1.2.1. ? high slew rate . . . . . . . . . . . . . . . . . . . . . . .50v/ s (min) 65v/ s (typ) ? wide power bandwidth . . . . . . . . . . . . . . . . 750khz (min) ? low offset current . . . . . . . . . . . . . . . . . . . . . . 25na (min) 10na (typ) ? high input impedance . . . . . . . . . . . . . . . . . . 50m ? (min) 100m ? (typ) ? wide small signal bandwidth . . . . . . . . . . . .12mhz (typ) ? fast settling time (0.1% of 10v step) . . . . . . 250ns (typ) ? low quiescent supply current . . . . . . . . . . . . 6ma (max) ? internally compensated for unity gain stability applications ? data acquisition systems ?rf amplifiers ? video amplifiers ? signal generators ? pulse amplification pinouts ordering information part number part marking temp. range ( o c) package pkg. dwg. # ha2-2510/883 ha2-2510/883 -55 to 125 8 pin can t8.c ha7-2510/883 ha7-2510/883 -55 to 125 8 ld cerdip f8.3a ha-2510/883 (cerdip) top view ha-2510/883 (metal can) top view 1 2 3 4 8 7 6 5 comp v+ out bal bal -in +in v- + - 2 4 6 1 3 7 5 8 comp out -in v- bal +in v+ bal + - data sheet fn3697.4 january 3, 2006 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2002, 2004, 2005, 2006. all rights reserved all other trademarks mentioned are the property of their respective owners.
2 fn3697.4 january 3, 2006 absolute maximum rati ngs thermal information voltage between v+ and v- terminals . . . . . . . . . . . . . . . . . . . .40v differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15v voltage at either input terminal . . . . . . . . . . . . . . . . . . . . . v+ to v- peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ma esd rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<2000v operating conditions temperature range. . . . . . . . . . . . . . . . . . . . . . . . . -55 o c to 125 o c supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15v v incm 1/2 (v+ - v-) r l 2k ? thermal resistance (typical, note 1) ja jc metal can package . . . . . . . . . . . . . . . . . 160 o c/w 75 o c/w cerdip package. . . . . . . . . . . . . . . . . . . 120 o c/w 30 o c/w package power dissipation limit at 75 o c for t j 175 o c metal can package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .625mw cerdip package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .870mw package power dissipation derating factor above 75 o c metal can package . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.3mw/ o c cerdip package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.7mw/ o c maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . .175 o c maximum storage temperature range . . . . . . . . . -65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . .300 o c caution: stresses above those listed in ?abs olute maximum ratings? may cause permanent dam age to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. note: 1. ja is measured with the component mounted on a low effective thermal conductivity test board in free air. see tech brief tb379 for details. table 1. dc electrical performance characteristics device tested at: v supply = 15v, r source = 100 ? , r load = 500k ? , v out = 0v, unless otherwise specified. parameter symbol conditions group a subgroups temp ( o c) min max units input offset voltage v io v cm = 0v 1 25 -8 8 mv 2, 3 125, -55 -18 10 mv input bias current +i b v cm = 0v, +r s = 100k ? , -r s = 100 ? 1 25 -200 200 na 2, 3 125, -55 -400 400 na -i b v cm = 0v, +r s = 100 ? , -r s = 100k ? 1 25 -200 200 na 2, 3 125, -55 -400 400 na input offset current i io v cm = 0v, +r s = 100k ? , -r s = 100k ? 1 25 -25 25 na 2, 3 125, -55 -50 50 na common mode range +cmr v+ = 5v, v- = -25v 1 25 +10 - v 2, 3 125, -55 +10 - v -cmr v+ = 25v, v- = -5v 1 25 - -10 v 2, 3 125, -55 - -10 v large signal voltage gain +a vol v out = 0v and +10v, r l = 2k ? 42510-kv/v 5, 6 125, -55 7.5 - kv/v -a vol v out = 0v and -10v, r l = 2k ? 42510-kv/v 5, 6 125, -55 7.5 - kv/v common mode rejection ratio +cmrr ? v cm = +10v, v+ = +5v, v- = -25v, v out = -10v 12580-db 2, 3 125, -55 80 - db -cmrr ? v cm = -10v, v+ = +25v, v- = -5v, v out = +10v 12580-db 2, 3 125, -55 80 - db ha-2510/883
3 fn3697.4 january 3, 2006 output voltage swing +v out r l = 2k ? 42510-v 5, 6 125, -55 10 - v -v out r l = 2k ? 425--10v 5, 6 125, -55 - -10 v output current +i out v out = -10v 4 25 10 - ma 5, 6 125, -55 7.5 - ma -i out v out = +10v 4 25 - -10 ma 5, 6 125, -55 - -7.5 ma quiescent power supply current +i cc v out = 0v, i out = 0ma 125-6ma 2, 3 125, -55 - 6.5 ma -i cc v out = 0v, i out = 0ma 125-6-ma 2, 3 125, -55 -6.5 - ma power supply rejection ratio +psrr ? v sup = 10v, v+ = +20v, v- = -15v, v+ = +10v, v- = -15v 12580-db 2, 3 125, -55 80 - db -psrr ? v sup = 10v, v+ = +15v, v- = -20v, v+ = +15v, v- = -10v 12580-db 2, 3 125, -55 80 - db offset voltage adjustment +v io adj note 2 1 25 v io -1 - mv 2, 3 125, -55 v io -1 - mv -v io adj note 2 1 25 v io +1 - mv 2, 3 125, -55 v io +1 - mv note: 2. offset adjustment range is [v io (measured) 1mv] minimum referred to output. this test is for functionality only to assure adjustment through 0v. table 2. ac electrical performance characteristics device tested at: v supply = 15v, r source = 50 ? , r load = 2k ? , c load = 50pf, a vcl = +1v/v, unless otherwise specified. parameter symbol conditions group a subgroups temp ( o c) min max units slew rate +sr v out = -5v to +5v, 25% +sr 75% 7 25 50 - v/ s 8a, 8b 125, -55 45 - v/ s -sr v out = +5v to -5v, 75% -sr 25% 7 25 50 - v/ s 8a, 8b 125, -55 45 - v/ s rise and fall time t r v out = 0 to +200mv, 10% t r 90% 7 25 - 50 ns 8a, 8b 125, -55 - 60 ns t f v out = 0 to -200mv, 10% t f 90% 7 25 - 50 ns 8a, 8b 125, -55 - 60 ns table 1. dc electrical performance characteristics (continued) device tested at: v supply = 15v, r source = 100 ? , r load = 500k ? , v out = 0v, unless otherwise specified. parameter symbol conditions group a subgroups temp ( o c) min max units ha-2510/883
4 fn3697.4 january 3, 2006 overshoot +os v out = 0 to +200mv 7 25 - 40 % 8a, 8b 125, -55 - 50 % -os v out = 0 to -200mv 7 25 - 40 % 8a, 8b 125, -55 - 50 % table 3. electrical performance characteristics device characterized at: v supply = 15v, r load = 2k ? , c load = 50pf, unless otherwise specified. parameter symbol conditions notes temp ( o c) min max units differential input resistance r in v cm = 0v 3 25 50 - m ? full power bandwidth fpbw v peak = 10v 3, 4 25 750 - khz minimum closed loop stable gain clsg r l = 2k ? , c l = 50pf 3 -55 to 125 1 - v/v quiescent power consumption pc v out = 0v, i out = 0ma 3, 5 -55 to 125 - 195 mw notes: 3. parameters listed in table 3 are controlled via design or pr ocess parameters and are not directly tested at final production. these parameters are lab characterized upon initial design release, or upon desi gn changes. these parameters are guaranteed by characterization based upon data from multiple production runs which refl ect lot to lot and within lot variation. 4. full power bandwidth guarantee based on slew ra te measurement using fpbw = slew rate/(2 v peak ). 5. quiescent power consumption based upon quiescent supp ly current test maximum. (no load on outputs.) table 4. electrical test requirements mil-std-883 test requirements subgroups (see tables 1 and 2) interim electrical parameters (pre burn-in) 1 final electrical test parameters 1 (note 6), 2, 3, 4, 5, 6, 7, 8a, 8b group a test requirements 1, 2, 3, 4, 5, 6, 7, 8a, 8b groups c and d endpoints 1 note: 6. pda applies to subgroup 1 only. table 2. ac electrical performance characteristics (continued) device tested at: v supply = 15v, r source = 50 ? , r load = 2k ? , c load = 50pf, a vcl = +1v/v, unless otherwise specified. parameter symbol conditions group a subgroups temp ( o c) min max units ha-2510/883
5 fn3697.4 january 3, 2006 die characteristics substrate potential (powered up): unbiased transistor count: 40 process: bipolar dielectric isolation metallization mask layout ha-2510/883 v- +in out bal -in v+ comp bal burn-in circuit ha7-2510/883 r 1 = 1m ? , 5%, 1/4w (min) c 1 = c 2 = 0.01 f/socket (min) or 0.1 f/row (min) c 3 = 0.01 f/socket (10%) d 1 = d 2 = 1n4002 or equivalent/board |(v+) - (v-)| = 30v v+ c 1 d 1 r 1 d 2 c 2 v- + - 1 3 4 8 7 6 5 2 c 3 ha-2510/883 ha-2510/883
6 fn3697.4 january 3, 2006 metal can packages (can) notes: 1. (all leads) ?b applies between l1 and l2. ?b1 applies between l2 and 0.500 from the reference plane. diameter is uncontrolled in l1 and beyond 0.500 from the reference plane. 2. measured from maximum diameter of the product. 3. is the basic spacing from the c enterline of the tab to terminal 1 and is the basic spacing of each lead or lead position (n -1 places) from , looking at the bottom of the package. 4. n is the maximum number of terminal positions. 5. dimensioning and tolerancing per ansi y14.5m - 1982. 6. controlling dimension: inch. ?b ?d2 ? e k1 k ?b1 base and seating plane f q ?d ?d1 l1 l2 reference plane l a ?b2 ?b1 base metal lead finish section a-a a a n e 1 c l 2 1 t8.c mil-std-1835 macy1-x8 (a1) 8 lead metal can package symbol inches millimeters notes min max min max a 0.165 0.185 4.19 4.70 - ?b 0.016 0.019 0.41 0.48 1 ?b1 0.016 0.021 0.41 0.53 1 ?b2 0.016 0.024 0.41 0.61 - ?d 0.335 0.375 8.51 9.40 - ?d1 0.305 0.335 7.75 8.51 - ?d2 0.110 0.160 2.79 4.06 - e 0.200 bsc 5.08 bsc - e1 0.100 bsc 2.54 bsc - f- 0.040 - 1.02 - k 0.027 0.034 0.69 0.86 - k1 0.027 0.045 0.69 1.14 2 l 0.500 0.750 12.70 19.05 1 l1 - 0.050 - 1.27 1 l2 0.250 - 6.35 -1 q 0.010 0.045 0.25 1.14 - 45 o bsc 45 o bsc 3 45 o bsc 45 o bsc 3 n8 84 rev. 0 5/18/94 ha-2510/883
7 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn3697.4 january 3, 2006 ha-2510/883 notes: 1. index area: a notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. the manufactu rer?s identification shall not be used as a pin one identification mark. 2. the maximum limits of lead dimensions b and c or m shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. dimensions b1 and c1 apply to lead base metal only. dimension m applies to lead plating and finish thickness. 4. corner leads (1, n, n/2, and n/2+1) may be configured with a partial lead paddle. for this conf iguration dimension b3 replaces dimension b2. 5. this dimension allows for off- center lid, meniscus, and glass overrun. 6. dimension q shall be measured from the seating plane to the base plane. 7. measure dimension s1 at all four corners. 8. n is the maximum number of terminal positions. 9. dimensioning and tolerancing per ansi y14.5m - 1982. 10. controlling dimension: inch. bbb c a - b s c q l a seating base d plane plane -d- -a- -c- -b- d e s1 b2 b a e m c1 b1 (c) (b) section a-a base lead finish metal e a/2 a m s s ccc c a - b m d s s aaa ca - b m d s s e a ceramic dual-in-line fr it seal packages (cerdip) f8.3a mil-std-1835 gdip1-t8 (d-4, configuration a) 8 lead ceramic dual-in-line frit seal package symbol inches millimeters notes min max min max a- 0.200 - 5.08 - b 0.014 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 - b3 0.023 0.045 0.58 1.14 4 c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3 d- 0.405 - 10.29 5 e 0.220 0.310 5.59 7.87 5 e 0.100 bsc 2.54 bsc - ea 0.300 bsc 7.62 bsc - ea/2 0.150 bsc 3.81 bsc - l 0.125 0.200 3.18 5.08 - q 0.015 0.060 0.38 1.52 6 s1 0.005 - 0.13 -7 90 o 105 o 90 o 105 o - aaa - 0.015 - 0.38 - bbb - 0.030 - 0.76 - ccc - 0.010 - 0.25 - m- 0.0015 - 0.038 2, 3 n8 88 rev. 0 4/94
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